OpenBSD ports

The lang/myhdl port

myhdl-0.11.49p1 – Python as a hardware description and verification language

Description

MyHDL is an open source Python package that lets you go from Python to
silicon. With MyHDL, you can use Python as a hardware description and
verification language. Furthermore, you can convert MyHDL code, that was
developed towards implementation, to Verilog and VHDL automatically, and
take it to a silicon implementation from there.
WWW: https://www.myhdl.org/
Only for arches
aarch64 aarch64 alpha amd64 amd64 arm arm hppa i386 i386 mips64 mips64 mips64el mips64el powerpc powerpc powerpc64 powerpc64 riscv64 riscv64 sparc64
Categories:
lang lang/python

Library dependencies

Build dependencies

Run dependencies